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  #3241  
Old 21-04-2020, 11:29
dotrongduc dotrongduc is offline
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Join Date: 08-2008
Posts: 10
Re: Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Quote:
Originally Posted by Leohi123 View Post
Có anh em nào muốn xúc ko ạ, em mới mua về xong được mấy tiếng, bản v1 2hand mà rom gốc lại ko hỗ trợ add link cho android, em để lại 400k ạ, còn bảo hành của shop.
Bác có ở Hà Nội không ? Nếu có zalo e phát 0947752969 (e ko inbox đc , ko đủ post)
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  #3242  
Old 21-04-2020, 22:16
SogoKu_vn's Avatar
SogoKu_vn SogoKu_vn is offline
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Join Date: 07-2006
Location: Đà Nẵng city
Posts: 6,525
Re: Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Mới debrick đúng nghĩa 1 em R3G chết uboot tối thui ko serial được, do up lộn thế nào đó của một thím nào đó trên voz cho lâu lâu lắm rồi. Mình khò NAND flash ra

Sau đó lấy 1 con SPI flash 16MB tối thiểu rồi nạp chương trình nào xài mạch CH341A nếu mua gần đây, mình thì xài gzut dreamproII mua hồi lâu quec, rồi khò vô lại mạch. Mình ko kiếm ra con SPI 16MB nào nên lấy tạm con 8MB trong camera bị hỏng ra

Kết quả serial console lên ầm ầm, giờ chỉ việc đi nạp lại firmware padavan lede openwrt j đó tùy
Code:
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2020.04.21 22:15:26 =~=~=~=~=~=~=~=~=~=~=~=


===================================================================

     		MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)

     		CPU=500000000 HZ BUS=125000000 HZ

==================================================================

Change MPLL source from XTAL to CR...

do MEMPLL setting..

MEMPLL Config : 0x11100000

3PLL mode + External loopback

=== XTAL-40Mhz === DDR-1200Mhz ===

PLL3 FB_DL: 0x8, 1/0 = 555/469 21000000

PLL2 FB_DL: 0xd, 1/0 = 683/341 35000000

PLL4 FB_DL: 0x13, 1/0 = 550/474 4D000000

do DDR setting..[01F40000]

Apply DDR3 Setting...(use customer AC)

          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120

      --------------------------------------------------------------------------------

0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1

000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1

000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0

0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0

0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0

0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

DRAMC_DQSCTL1[0e0]=13000000

DRAMC_DQSGCTL[124]=80000033

rank 0 coarse = 15

rank 0 fine = 72

B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0

opt_dle value:11

DRAMC_DDR2CTL[07c]=C287223D

DRAMC_PADCTL4[0e4]=000022B3

DRAMC_DQIDLY1[210]=0A0A080A

DRAMC_DQIDLY2[214]=070A0907

DRAMC_DQIDLY3[218]=08080604

DRAMC_DQIDLY4[21c]=07070B07

DRAMC_R0DELDLY[018]=00001E1F

==================================================================

		RX	DQS perbit delay software calibration 

==================================================================

1.0-15 bit dq delay value

==================================================================

bit|     0  1  2  3  4  5  6  7  8  9

--------------------------------------

0 |    10 6 7 9 7 9 8 7 3 5 

10 |    6 6 7 9 6 7 

--------------------------------------



==================================================================

2.dqs window

x=pass dqs delay value (min~max)center 

y=0-7bit DQ of every group

input delay:DQS0 =31 DQS1 = 30

==================================================================

bit	DQS0	 bit      DQS1

0  (1~62)31  8  (1~57)29

1  (1~58)29  9  (1~57)29

2  (0~57)28  10  (1~56)28

3  (1~60)30  11  (1~56)28

4  (1~62)31  12  (1~60)30

5  (2~60)31  13  (1~56)28

6  (0~58)29  14  (1~58)29

7  (1~62)31  15  (0~60)30

==================================================================

3.dq delay value last

==================================================================

bit|    0  1  2  3  4  5  6  7  8   9

--------------------------------------

0 |    10 8 10 10 7 9 10 7 4 6 

10 |    8 8 7 11 7 7 

==================================================================

==================================================================

     TX  perbyte calibration 

==================================================================

DQS loop = 15, cmp_err_1 = ffff0000 

dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 

dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 

DQ loop=15, cmp_err_1 = ffff01aa

DQ loop=14, cmp_err_1 = ffff0080

dqs_perbyte_dly.last_dqdly_pass[1]=14,  finish count=1 

DQ loop=13, cmp_err_1 = ffff0080

DQ loop=12, cmp_err_1 = ffff0000

dqs_perbyte_dly.last_dqdly_pass[0]=12,  finish count=2 

byte:0, (DQS,DQ)=(9,8)

byte:1, (DQS,DQ)=(8,8)

DRAMC_DQODLY1[200]=88888888

DRAMC_DQODLY2[204]=88888888

20,data:89

[EMI] DRAMC calibration passed




===================================================================

     		MT7621   stage1 code done 

     		CPU=500000000 HZ BUS=125000000 HZ

===================================================================



U-Boot 1.1.3 (Oct  6 2017 - 20:26:30)


Board: MediaTek APSoC DRAM: 256 MB


Config XHCI 40M PLL 

MediaTek SPI flash driver, SPI clock: 44MHz

spi device id: c2 20 17 c2

find flash: MX25L6406E

============================================ 

MediaTek U-Boot Version: 5.0.1.0-6

-------------------------------------------- 

ASIC MT7621A DualCore (MAC to MT7530 Mode)

DRAM_CONF_FROM: Auto-Detection 

DRAM_TYPE: DDR3 

DRAM bus: 16 bit

Xtal Mode=5 OCP Ratio=1/4

Flash component: SPI Flash

Date:Oct  6 2017  Time:20:26:30

============================================ 

icache: sets:256, ways:4, linesz:32, total:32768

dcache: sets:256, ways:4, linesz:32, total:32768 


 #### The CPU freq = 880 MHZ #### 

 estimate memory size = 256 Mbytes


 Reset MT7530

set LAN/WAN WLLLL


Please choose the operation: 

   1: Load system code to SDRAM via TFTP.

   2: Load system code then write to Flash via TFTP.

   3: Boot system code via Flash (default).

   4: Enter boot command line interface.

   5: Load system code then write to Flash via USB Storage.

   9: Load U-Boot code then write to Flash via TFTP.



You choosed 4


 0 


   

4: System Enter Boot Command Line Interface.


U-Boot 1.1.3 (Oct  6 2017 - 20:26:30)

MT7621 #
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Last edited by SogoKu_vn; 21-04-2020 at 22:30.
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  #3243  
Old 21-04-2020, 22:45
anhhungaogiap's Avatar
anhhungaogiap anhhungaogiap is offline
Senior Member
Join Date: 06-2012
Posts: 177
Re: Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Quote:
Originally Posted by SogoKu_vn View Post
Mới debrick đúng nghĩa 1 em R3G chết uboot tối thui ko serial được, do up lộn thế nào đó của một thím nào đó trên voz cho lâu lâu lắm rồi. Mình khò NAND flash ra

Sau đó lấy 1 con SPI flash 16MB tối thiểu rồi nạp chương trình nào xài mạch CH341A nếu mua gần đây, mình thì xài gzut dreamproII mua hồi lâu quec, rồi khò vô lại mạch. Mình ko kiếm ra con SPI 16MB nào nên lấy tạm con 8MB trong camera bị hỏng ra

Kết quả serial console lên ầm ầm, giờ chỉ việc đi nạp lại firmware padavan lede openwrt j đó tùy
Code:
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2020.04.21 22:15:26 =~=~=~=~=~=~=~=~=~=~=~=


===================================================================

     		MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)

     		CPU=500000000 HZ BUS=125000000 HZ

==================================================================

Change MPLL source from XTAL to CR...

do MEMPLL setting..

MEMPLL Config : 0x11100000

3PLL mode + External loopback

=== XTAL-40Mhz === DDR-1200Mhz ===

PLL3 FB_DL: 0x8, 1/0 = 555/469 21000000

PLL2 FB_DL: 0xd, 1/0 = 683/341 35000000

PLL4 FB_DL: 0x13, 1/0 = 550/474 4D000000

do DDR setting..[01F40000]

Apply DDR3 Setting...(use customer AC)

          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120

      --------------------------------------------------------------------------------

0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1

000E:|    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1

000F:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0

0010:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0

0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0

0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

DRAMC_DQSCTL1[0e0]=13000000

DRAMC_DQSGCTL[124]=80000033

rank 0 coarse = 15

rank 0 fine = 72

B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0

opt_dle value:11

DRAMC_DDR2CTL[07c]=C287223D

DRAMC_PADCTL4[0e4]=000022B3

DRAMC_DQIDLY1[210]=0A0A080A

DRAMC_DQIDLY2[214]=070A0907

DRAMC_DQIDLY3[218]=08080604

DRAMC_DQIDLY4[21c]=07070B07

DRAMC_R0DELDLY[018]=00001E1F

==================================================================

		RX	DQS perbit delay software calibration 

==================================================================

1.0-15 bit dq delay value

==================================================================

bit|     0  1  2  3  4  5  6  7  8  9

--------------------------------------

0 |    10 6 7 9 7 9 8 7 3 5 

10 |    6 6 7 9 6 7 

--------------------------------------



==================================================================

2.dqs window

x=pass dqs delay value (min~max)center 

y=0-7bit DQ of every group

input delay:DQS0 =31 DQS1 = 30

==================================================================

bit	DQS0	 bit      DQS1

0  (1~62)31  8  (1~57)29

1  (1~58)29  9  (1~57)29

2  (0~57)28  10  (1~56)28

3  (1~60)30  11  (1~56)28

4  (1~62)31  12  (1~60)30

5  (2~60)31  13  (1~56)28

6  (0~58)29  14  (1~58)29

7  (1~62)31  15  (0~60)30

==================================================================

3.dq delay value last

==================================================================

bit|    0  1  2  3  4  5  6  7  8   9

--------------------------------------

0 |    10 8 10 10 7 9 10 7 4 6 

10 |    8 8 7 11 7 7 

==================================================================

==================================================================

     TX  perbyte calibration 

==================================================================

DQS loop = 15, cmp_err_1 = ffff0000 

dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 

dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 

DQ loop=15, cmp_err_1 = ffff01aa

DQ loop=14, cmp_err_1 = ffff0080

dqs_perbyte_dly.last_dqdly_pass[1]=14,  finish count=1 

DQ loop=13, cmp_err_1 = ffff0080

DQ loop=12, cmp_err_1 = ffff0000

dqs_perbyte_dly.last_dqdly_pass[0]=12,  finish count=2 

byte:0, (DQS,DQ)=(9,8)

byte:1, (DQS,DQ)=(8,8)

DRAMC_DQODLY1[200]=88888888

DRAMC_DQODLY2[204]=88888888

20,data:89

[EMI] DRAMC calibration passed




===================================================================

     		MT7621   stage1 code done 

     		CPU=500000000 HZ BUS=125000000 HZ

===================================================================



U-Boot 1.1.3 (Oct  6 2017 - 20:26:30)


Board: MediaTek APSoC DRAM: 256 MB


Config XHCI 40M PLL 

MediaTek SPI flash driver, SPI clock: 44MHz

spi device id: c2 20 17 c2

find flash: MX25L6406E

============================================ 

MediaTek U-Boot Version: 5.0.1.0-6

-------------------------------------------- 

ASIC MT7621A DualCore (MAC to MT7530 Mode)

DRAM_CONF_FROM: Auto-Detection 

DRAM_TYPE: DDR3 

DRAM bus: 16 bit

Xtal Mode=5 OCP Ratio=1/4

Flash component: SPI Flash

Date:Oct  6 2017  Time:20:26:30

============================================ 

icache: sets:256, ways:4, linesz:32, total:32768

dcache: sets:256, ways:4, linesz:32, total:32768 


 #### The CPU freq = 880 MHZ #### 

 estimate memory size = 256 Mbytes


 Reset MT7530

set LAN/WAN WLLLL


Please choose the operation: 

   1: Load system code to SDRAM via TFTP.

   2: Load system code then write to Flash via TFTP.

   3: Boot system code via Flash (default).

   4: Enter boot command line interface.

   5: Load system code then write to Flash via USB Storage.

   9: Load U-Boot code then write to Flash via TFTP.



You choosed 4


 0 


   

4: System Enter Boot Command Line Interface.


U-Boot 1.1.3 (Oct  6 2017 - 20:26:30)

MT7621 #



E cũng có 1 con bị brick bootloader. Thím có thể giúp e không
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  #3244  
Old 24-04-2020, 14:05
hoang.hien2903's Avatar
hoang.hien2903 hoang.hien2903 is offline
Member
Join Date: 06-2017
Posts: 38
Re: Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Ai cứu mình con Router gen 3g v1 này cái, mình đã backup, up breed thành công hết rồi. Mình tải firmware padavan ở đây về rồi up qua breed, báo thành công luôn nhưng đến khi nó reboot lại thì cứ sáng đèn xanh liên tục, không hiện lên cái wifi Asus. Ai chỉ mình với, xin cảm ơn.
https://github.com/lukasz1992/asuswrt-r3g/releases



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Last edited by hoang.hien2903; 24-04-2020 at 14:10.
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  #3245  
Old 11-05-2020, 12:45
finnal123 finnal123 is offline
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Join Date: 07-2013
Posts: 15
Re: Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Bác chờ 2p rồi rút điện ra cắm lại, vào router bằng ip default của bản build
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  #3246  
Old 12-05-2020, 07:20
SUPERBOY.DC's Avatar
SUPERBOY.DC SUPERBOY.DC is offline
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Join Date: 04-2016
Posts: 1,109
Re: Page 325 - Đánh giá router xiaomi gen 3G sau 2 tuần sử dụng

Quote:
Originally Posted by anhhungaogiap View Post
E cũng có 1 con bị brick bootloader. Thím có thể giúp e không
Thanh lý ko bác ơi

via vozForums for iPhone
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